rev. b information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. a adp3308 one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781/329-4700 world wide web site: http://www.analog.com fax: 781/326-8703 ? analog devices, inc., 2000 anycap 50 ma low dropout linear regulator functional block diagram cc out gnd r1 r2 q1 in sd adp3308 bandgap ref q2 err /nc driver thermal protection g m features 1.2% accuracy over line and load regulations @ 25 c ultralow dropout voltage: 80 mv typical @ 50 ma requires only c o = 0.47 f for stability anycap = stable with all types of capacitors (including mlcc) current and thermal limiting low noise low shutdown current: 1 a 2.8 v to 12 v supply range C20 c to +85 c ambient temperature range several fixed voltage options ultrasmall sot-23-5 package excellent line and load regulations applications cellular telephones notebook, palmtop computers battery powered systems pcmcia regulator bar code scanners camcorders, cameras general description the adp3308 is a member of the adp330x family of precision low dropout anycap voltage regulators. it is pin-for-pin and functionally compatible with nationals lp2980, but offers performance advantages. the adp3308 stands out from the conventional ldos with a novel architecture and an enhanced process. its patented design requires only a 0.47 f output capacitor for stability. this device is stable with any type of capacitor regardless of its esr (equivalent serial resistance) value, including ceramic types for space restricted applications. the adp3308 achieves 1.2% accuracy at room temperature and 2.2% overall accuracy over temperature, line and load regulations. the dropout voltage of the adp3308 is only 80 mv (typical) at 50 ma. this device also includes a current limit and a shutdown feature. in shutdown mode, the ground current is reduced to ~1 a. the adp3308 operates with a wide input voltage range from 2.8 v to 12 v and delivers a load current in excess of 100 ma. the adp3308 anycap ldo offers a wide range of output voltages. for 100 ma version, refer to the adp3309 data sheet. anycap is a registered trademark of analog devices, inc. adp3308-3.3 out v in in gnd v out = +3.3v on off 5 sd c1 0.47 f c2 0.47 f err /nc 1 2 3 4 figure 1. typical application circuit obsolete
C2C rev. b adp3308-xx?pecifications (@ t a = ?0 c to +85 c, v in = 7 v, c in = 0.47 f, c out = 0.47 f, unless otherwise noted.) 1 the following specifications apply to all voltage options. parameter symbol conditions min typ max unit output voltage accuracy v out v in = v outnom + 0.3 v to 12 v i l = 0.1 ma to 50 ma t a = 25 c C1.2 +1.2 % v in = v outnom + 0.3 v to 12 v i l = 0.1 ma to 50 ma C2.2 +2.2 % line regulation v in = v outnom + 0.3 v to 12 v t a = 25 c 0.02 mv/v load regulation i l = 0.1 ma to 50 ma t a = 25 c 0.06 mv/ma ground current i gnd i l = 50 ma 0.54 1.4 ma i l = 0.1 ma 0.19 0.3 ma ground current in dropout i gnd v in = 2.4 v i l = 0.1 ma 0.9 1.7 ma dropout voltage v drop v out = 98% of v outnom i l = 50 ma 0.08 0.17 v i l = 10 ma 0.025 0.07 v i l = 1 ma 0.004 0.030 v shutdown threshold v thsd on 2.0 0.75 v off 0.75 0.3 v shutdown pin input current i sdin 0 < v sd 5 v 1 a 5 < v sd 12 v @ v in = 12 v 9 a ground current in shutdown i q v sd = 0 v, v in = 12 v mode t a = 25 c 0.005 1 a v sd = 0 v, v in = 12 v t a = 85 c 0.01 3 a output current in shutdown i osd t a = 25 c @ v in = 12 v 2 a mode t a = 85 c @ v in = 12 v 4 a error pin output leakage i el 13 a error pin output low voltage v eol i sink = 400 a 0.12 0.3 v peak load current i ldpk v in = v outnom + 1 v, t a = 25 c 150 ma output noise @ 5 v output v noise f = 10 hzC100 khz 100 v rms notes 1 ambient temperature of 85 c corresponds to a junction temperature of 125 c under typical full load test conditions. specifications subject to change without notice. ? v o ? v in ? v o ? i l obsolete
adp3308 C3C rev. b absolute maximum ratings * input supply voltage . . . . . . . . . . . . . . . . . . . C0.3 v to +16 v shutdown input voltage . . . . . . . . . . . . . . . . C0.3 v to +16 v power dissipation . . . . . . . . . . . . . . . . . . . internally limited operating ambient temperature range . . . C55 c to +125 c operating junction temperature range . . . C55 c to +125 c ja . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165 c/w jc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 c/w storage temperature range . . . . . . . . . . . . C65 c to +150 c lead temperature range (soldering 10 sec) . . . . . . . . 300 c vapor phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . 215 c infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220 c * this is a stress rating only; operation beyond these limits can cause the device to be permanently damaged. ordering guide voltage package marking model output option * code adp3308art-2.5 2.5 v sot-23 lac adp3308art-2.7 2.7 v sot-23 dac adp3308art-2.85 2.85 v sot-23 djc adp3308art-2.9 2.9 v sot-23 dkc adp3308art-3 3.0 v sot-23 dcc adp3308art-3.3 3.3 v sot-23 dec adp3308art-3.6 3.6 v sot-23 dfc * sot = surface mount. contact the factory for the availability of other output voltage options. other member of anycap family 1 model output current package option 2 adp3309 100 ma sot-23-5 lead notes 1 see individual data sheet for detailed ordering information. 2 sot = surface mount. pin function descriptions pin name function 1 in regulator input. 2 gnd ground pin. 3 sd active low shutdown pin. connect to ground to disable the regulator output. when shutdown is not used, this pin should be connected to the input pin. 4 err /nc open collector. output that goes low to indicate the output is about to go out of regulation or no connect. 5 out output of the regulator, fixed 2.5, 2.7, 2.85, 2.9, 3.0, 3.3, or 3.6 volts output voltage. bypass to ground with a 0.47 f or larger capacitor. pin configuration 1 2 3 4 5 top view (not to scale) in gnd out adp3308 sd err /nc nc = no connect caution esd (electrostatic discharge) sensitive device. electrostatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge without detection. although the adp3308 features proprietary esd protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. therefore, proper esd precautions are recommended to avoid performance degradation or loss of functionality. warning! esd sensitive device obsolete
adp3308 C4C rev. b typical performance characteristics input voltage ?volts output voltage ?volts 3.302 3.299 3.296 3.3 14 4 5 6 7 8 9 10111213 3.301 3.300 3.298 3.297 i l = 0ma i l = 10ma i l = 50ma v out = 3.3v 3.295 tpc 1. line regulation: output voltage vs. supply voltage output load ma 800 ground current a 675 175 080 20 40 60 550 425 300 i l = 0 to 80ma tpc 4. quiescent current vs. load current output load ma 120 96 080 20 40 60 72 48 24 0 input/output voltage mv tpc 7. dropout voltage vs. output current output voltage volts output load ma 3.302 3.295 080 8 1624324048566472 3.301 3.300 3.299 3.298 3.297 3.296 v out = 3.3v v in = 7v tpc 2. output voltage vs. load current temperature c output voltage % 0.2 0.4 45 25 135 51535 7595115 55 0.1 0.0 0.1 0.2 0.3 i l = 0ma i l = 30ma i l = 50ma tpc 5. output voltage variation % vs. temperature input voltage volts 5 0 03 0 432 4 2 1 3 2 11 input/output voltage volts v out = 3.3v r l = 66 tpc 8. power-up/power-down input voltage volts 1150 900 0 0 12.0 1.2 2.4 3.6 4.8 6.0 7.2 8.4 9.6 10.8 650 400 ground current a 160 v out = 3.3v i l = 0ma tpc 3. quiescent current vs. supply voltage temperature c 700 0 45 25 600 400 300 200 100 500 15 35 55 75 95 115 135 5 v in = 7v ground current a i l = 50ma i l = 0ma tpc 6. quiescent current vs. temperature time s 0 0 100 200 2.0 v sd = v in c l = 0.47 f r l = 66 v out = 3.3v 1.0 3.0 4.0 5.0 6.0 7.0 8.0 20 input/output voltage volts 40 60 80 120 140 160 180 v in v out tpc 9. power-up overshoot obsolete
adp3308 C5C rev. b time s volts 3.320 3.280 0 400 40 80 120 160 200 240 280 320 360 3.310 3.300 7.5 7.0 3.290 r l = 66 c l = 0.47 f v in v out = 3.3v tpc 10. line transient response time s volts 3.320 3.290 0 500 100 200 300 400 3.310 100 10 3.300 v out = 3.3v c l = 4.7 f ma 3.280 i out tpc 13. load transient time s 2 0 0 100 20 40 60 80 1 0 4 3 3 v out = 3.3v r l = 66 c l = 0.47 f volts 3.3v v sd tpc 16. turn off time s volts 3.320 3.280 0 200 20 40 60 80 100 120 140 160 180 3.310 3.300 7.5 7.0 3.290 r l = 3.3k c l = 0.47 f v out = 3.3v v in tpc 11. line transient response time s 200 0 05 1234 150 100 3.3 0 50 ma i out v out = 3.3v volts v out tpc 14. short circuit current frequency hz ripple rejection db 0 100 10 100 10m 1k 10k 100k 1m 10 60 70 80 90 20 30 50 40 b d a c b d a c v out = +3.3v a. 0.47 f, r l = 3.3k b. 0.47 f, r l = 66 c. 4.7 f, r l = 3.3k d. 4.7 f, r l = 66 tpc 17. power supply ripple rejection time s 3.320 3.280 0 500 100 200 300 400 3.310 3.300 100 10 3.290 v out = 3.3v c l = 0.47 f volts ma i out tpc 12. load transient time s 2 0 0 100 20 40 60 80 1 0 4 3 +3 v out = 3.3v r l = 66 volts v out c l = 0.47 f 3.3v c l = 4.7 f v sd +3v tpc 15. turn on frequency hz voltage noise spectral density v/ hz 10 1 0.01 100 1k 100k 10k 0.1 v out = 3.3v c l = 0.47 f i l = 1ma tpc 18. output noise density obsolete
adp3308 C6C rev. b theory of operation the new anycap ldo adp3308 uses a single control loop for regulation and reference functions. the output voltage is sensed by a resistive voltage divider consisting of r1 and r2, which is varied to provide the available output voltage option. feedback is taken from this network by way of a series diode (d1) and a second resistor divider (r3 and r4) to the input of an amplifier. g m adp3308 ptat v os noninverting wideband driver input output compensation capacitor attenuation (v bandgap /v out ) r3 d1 r1 q1 ptat current r2 (a) r load c load gnd r4 figure 2. functional block diagram a very high gain error amplifier is used to control this loop. the amplifier is constructed in such a way that at equilibrium it produces a large, temperature proportional input offset voltage that is repeatable and very well controlled. the temperature proportional offset voltage is combined with the compleme ntary diode voltage to form a virtual bandgap voltage, implicit in the network, although it never appears explicitly in the circuit. ultimately, this patented design makes it possible to control the loop with only one amplifier. this technique also improves the noise characteristics of the amplifier by providing more flexibil- ity on the tradeoff of noise sources that leads to a low noise design. the r1, r2 divider is chosen in the same ratio as the bandgap voltage to the output voltage. although the r1, r2 resistor divider is loaded by the diode d1 and a second divider consisting of r3 and r4, the values can be chosen to produce a tempera- ture stable output. this unique arrangement specifically corrects for the loading of the divider so that the error resulting from base current loading in conventional circuits is avoided. the patented amplifier controls a new and unique noninverting driver that drives the pass transistor, q1. the use of this special noninverting driver enables the frequency compensation to include the load capacitor in a pole splitting arrangement to achieve reduced sensitivity to the value, type and esr of the load capacitance. most ldos place very strict requirements on the range of esr values for the output capacitor because they are difficult to stabilize due to the uncertainty of load capacitance and resis- tance. moreover, the esr value required to keep conventional ldos stable, changes, depending on load and temperature. these esr limitations make designing with ldos more diffi- cult because of their unclear specifications and extreme varia- tions over temperature. this is no longer true with the adp3308 anycap ldo. it can be used with virtually any capacitor, with no constraint on the minimum esr. this innovative design allows the circuit to be stable with just a small 0.47 f capacitor on the output. addi- tional advantages of the design scheme include superior line noise rejection and very high regulator gain which leads to excellent line and load regulation. an impressive 2.2% accuracy is guar- anteed over line, load and temperature. additional features of the circuit include current limit and ther- mal shutdown. compared to the standard solutions that give warning after the output has lost regulation, the adp3308 pro- vides improved system performance by enabling the err pin to give warning before the device loses regulation. as the chips temperature rises above 165 c, the circuit activates a soft thermal shutdown, indicated by a signal low on the err pin, to reduce the current to a safe level. application information capacitor selection: anycap output capacitors: as with any micropower device, output transient response is a function of the output capacitance. the adp3308 is stable with a wide range of capacitor values, types and esr (anycap). a capacitor as low as 0.47 f is all that is needed for stability. however, larger capacitors can be used if high output current surges are anticipated. the adp3308 is stable with extremely low esr capacitors (esr 0), such as multilayer ceramic capacitors (mlcc) or oscon. input bypass capacitor: an input bypass capacitor is not required. however, for applications where the input source is high imped- ance or far from the input pin, a bypass capacitor is recommended. connecting a 0.47 f capacitor from the input pin (pin 1) to ground reduces the circuits sensitivity to pc board layout. if a bigger output capacitor is used, the input capacitor must be 1 f minimum. thermal overload protection the adp3308 is protected against damage due to excessive power dissipation by its thermal overload protection circuit which limits the die temperature to a maximum of 165 c. under extreme conditions (i.e., high ambient temperature and power dissipation) where die temperature starts to rise above 165 c, the output current is reduced until the die temperature has dropped to a safe level. the output current is restored when the die temperature is reduced. current and thermal limit protections are intended to protect the device against accidental overload conditions. for normal operation, device power dissipation should be externally limited so that junction temperatures will not exceed 125 c. calculating junction temperature device power dissipation is calculated as follows: p d = ( v in C v out ) i load + ( v in ) i gnd where i load and i gnd are load current and ground current, v in and v out are input and output voltages respectively. assuming i load = 50 ma, i gnd = 2 ma, v in = 5.5 v and v out = 2.7 v, device power dissipation is: p d = (5.5 C 2.7) 50 ma + 5.5 2 ma = 151 mw ? t = t j C t a = p d j a = 151 165 = 24.9 c with a maximum junction temperature of 125 c, this yields a maximum ambient temperature of ~100 c. printed circuit board layout consideration surface mount components rely on the conductive traces or pads to transfer heat away from the device. appropriate pc board layout techniques should be used to remove heat from the immediate vicinity of the package. obsolete
adp3308 C7C rev. b the following general guidelines will be helpful when designing a board layout: 1. pc board traces with larger cross section areas will remove more heat. for optimum results, use pc boards with thicker copper and or wider traces. 2. increase the surface area exposed to open air so heat can be removed by convection or forced air flow. 3. do not use solder mask or silk screen on the heat dissipating traces because it will increase the junction to ambient thermal resistance of the package. shutdown mode applying a ttl high signal to the shutdown pin or tying it to the input pin will turn the output on. pulling the shutdown pin down to a ttl low signal or tying it to ground will turn the output off. in shutdown mode, quiescent current is reduced to less than 1 a. application circuits crossover switch the circuit in figure 3 shows that two adp3308s can be used to form a mixed supply voltage system. the output switches between two different levels selected by an external digital input. output voltages can be any combination of voltages from the ordering guide of the data sheet. adp3308-3.0 out in gnd output select 4v 0v sd c1 1.0 f adp3308-3.3 out in gnd sd c2 0.47 f v out = 3.0v/3.3v v in = 4v to 12v figure 3. crossover switch d1 1n5817 c2 100 f 10v l1 6.8 h r1 120 c3 2.2 f 3.0v@50ma c1 100 f 10v v in = 2.5v to 3.5v r2 30.1k 1% q1 2n3906 q2 2n3906 r4 274k r3 124k 1% adp3000-adj i lim v in sw1 gnd sw2 fb adp3308-3.0 in sd out gnd figure 5. constant dropout post regulator higher output current the adp3308 can source up to 50 ma without any heatsink or pass transistor. if higher current is needed, an appropriate pass transistor can be used, as in figure 4, to increase the output current to 1 a. v in = 4v to 8v v out = 3.0v @ 1a mje253 * c1 47 f r1 50 * aavid531002 heat sink is used adp3308-3.0 gnd sd c2 10 f in out figure 4. higher output current linear regulator constant dropout post regulator the circuit in figure 5 provides high precision with low dropout for any regulated output voltage. it significantly reduces the ripple from a switching regulator while providing a constant dropout voltage, which limits the power dissipation of the ldo to 30 mw. the adp3000 used in this circuit is a switching regulator in the step-up configuration. obsolete
adp3308 C8C rev. b outline dimensions dimensions shown in inches and (mm). c00140bC.5C12/00 (rev. b) printed in u.s.a. 5-lead surface mount package (sot-23) 1 3 2 54 0.122 (3.10) 0.106 (2.70) pin 1 0.071 (1.80) 0.059 (1.50) 0.118 (3.00) 0.098 (2.50) 0.075 (1.90) ref 0.0374 (0.95) ref 0.020 (0.50) 0.010 (0.25) 0.051 (1.30) 0.035 (0.90) seating plane 0.057 (1.45) 0.035 (0.90) 0.006 (0.15) 0.000 (0.00) 0.009 (0.23) 0.003 (0.08) 0.022 (0.55) 0.014 (0.35) 10 0 obsolete
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